The Future of HPC through Driving Challenges and Enabling Opportunities Keynote by Thomas Sterling
  • Thomas Sterling, PRACE, XSEDE, RIKEN, Compute Canada
  • June 2016

Slide contents

  • The Future of HPC through Driving Challenges and Enabling Opportunities
  • Projected Performance Development
  • Projected Performance Development
  • Sunway TaihuLight
  • Node Architecture
  • 40 cabinets, 3.1 Pflops each
  • Architecture Constraints
  • Slide courtesy of Maciej Brodowicz, 06/16/2016
  • Slide courtesy of Maciej Brodowicz, 06/16/2016
  • Knights Landing
  • ANL Aurora
  • The Negative Impact of Global Barriers in Astrophysics Codes
  • Amdahl’s Law with Overhead
  • Head room, margins, potential innovations
  • Head room, margins, potential innovations
  • Head room, margins, potential innovations
  • Game Changer – Runtime System
  • Distinguishing Features of ParalleX/HPX
  • Performance Model, Full Example System
  • Gain with Respect to Cores per Node and Overhead; Latency of 8192 reg-ops, 64 Tasks per Core
  • Motivation for HPX
  • SpMV for parcels and memget
  • Wavelet Adaptive Multiresoultion
  • Time Required to Check if Memory Address is Local or Remote in HPX5
  • Time Required to Perform a Context Switch Between Lightweight Threads in HPX5
  • Time Required to Create a New Lightweight Thread in HPX5
  • Laser Interferometric Gravitational-wave Observatory (LIGO)
  • LIGO Chirp Filter for Signal Target
  • Kaplowee!!!
  • Discovery